- R-9: tests/kicad/project-sync.spec.ts gains an effect-asserting test — stages a self-contained footprint lib (ecc83 R_Axial as SyncFixture.pretty + absolute-uri fp-lib-table via a new stageAndOpen beforeOpen hook), presses Update PCB, and asserts the board's footprint references through kicadCollabSnapshot/kicadCollabTestItemBlob (R777, then R888 after a schematic rewrite + re-sync). Red-first: the dialog report said "Add R777" while the board stayed empty when the button click never landed. - R-2: tests/kicad/via-snapshot-assert.spec.ts — two-via board, exact widths + no PCB_VIA::GetWidth wx assert line in the console. - R-4: tests/web/console-copy.spec.ts — Ctrl/Cmd+C over a console selection fires `copy` (guard stops the keydown before wx); canvas pointerdown collapses the selection. ControlOrMeta: headless engines use the HOST copy accelerator regardless of the device UA. - R-3: workers/cdn gets a vitest harness (package.json + lockfile) and test/index.test.ts with a workerd-like stub bucket (always-defined range): plain GET is 200/no Content-Range, Range → 206, HEAD/304/404/405/OPTIONS. Mutation-verified (pre-1ea35f7 gating → 2 reds). CI step added after the corpus lint; node_modules gitignored. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_015j8uFzSjwRrAeJ85QWVLQa
112 lines
4.2 KiB
TypeScript
112 lines
4.2 KiB
TypeScript
import { test, expect, type Page } from "./fixtures";
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import { execSync } from "child_process";
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import * as path from "path";
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/**
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* repro for R-2 (docs/features/findings/groups/R-fixed-during-demo-record.md)
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*
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* `itemToJson` (wasm/bindings/pcbnew_embind.cpp) once called the layerless
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* virtual `PCB_VIA::GetWidth()` — since the padstack refactor that is a
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* wxCHECK trap ("Warning: PCB_VIA::GetWidth called without a layer argument",
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* pcbnew/pcb_track.cpp) — once per via per snapshot. The value came back
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* right (the wxCHECK's fallback IS the ALL_LAYERS slot), so no spec noticed;
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* on a big board every collab baseline/snapshot was an assert storm in the
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* console. The fix passes `PADSTACK::ALL_LAYERS`.
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*
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* Oracle: the wx assert line in the console (the wasm build logs asserts via
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* wxMessageOutputDebug and continues — wxTrap is a no-op there), plus the
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* via width itself. Harness: pcbnew-collab.html (wizard-skipping seed), a
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* two-via board written into MEMFS.
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*/
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const VIA1 = "aaaaaaaa-0000-4000-8000-00000000c001";
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const VIA2 = "aaaaaaaa-0000-4000-8000-00000000c002";
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const VIA_PCB = `(kicad_pcb
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\t(version 20241229)
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\t(generator "pcbnew")
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\t(generator_version "9.0")
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\t(general (thickness 1.6))
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\t(paper "A4")
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\t(layers
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\t\t(0 "F.Cu" signal)
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\t\t(2 "B.Cu" signal)
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\t\t(25 "Edge.Cuts" user)
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\t)
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\t(setup)
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\t(net 0 "")
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\t(via (at 80 80) (size 1.4) (drill 0.6) (layers "F.Cu" "B.Cu") (net 0) (uuid "${VIA1}"))
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\t(via (at 90 80) (size 0.8) (drill 0.4) (layers "F.Cu" "B.Cu") (net 0) (uuid "${VIA2}"))
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)
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`;
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const VIA_WIDTH_ASSERT =
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/PCB_VIA::GetWidth called without a layer argument|assert "false" failed in GetWidth\(\)/;
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interface FS { mkdirTree(p: string): void; writeFile(p: string, d: string): void; }
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interface Mod { kicadOpenFile(p: string): unknown; kicadCollabSnapshot(): string; }
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async function bootAndOpen(page: Page): Promise<void> {
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await page.goto("/kicad/pcbnew-collab.html");
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await expect(page.locator("#canvas")).toBeVisible({ timeout: 90000 });
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await page.waitForFunction(
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() => {
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const m = (window as unknown as { Module?: Partial<Mod> }).Module;
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return typeof m?.kicadOpenFile === "function" && typeof m?.kicadCollabSnapshot === "function";
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},
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null,
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{ timeout: 90000 },
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);
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await page.waitForFunction(
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() =>
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!!window.wxElementRegistry &&
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window.wxElementRegistry
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.findAll({ visible: true })
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.some((e) => /Frame$/.test(e.typeName) || (e.name || "").endsWith("Frame")),
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null,
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{ timeout: 90000 },
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);
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await page.evaluate((content) => {
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const w = window as unknown as { FS: FS; Module: Mod };
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const dir = "/home/kicad/documents";
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try { w.FS.mkdirTree(dir); } catch { /* exists */ }
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const p = `${dir}/vias.kicad_pcb`;
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w.FS.writeFile(p, content);
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w.Module.kicadOpenFile(p);
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}, VIA_PCB);
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await expect.poll(() => page.title(), { timeout: 30000 }).toMatch(/vias/i);
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}
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test.beforeAll(() => {
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execSync("node collab/build.mjs", { cwd: path.resolve(__dirname, ".."), stdio: "inherit" });
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});
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test("snapshotting a board with vias emits their width without a GetWidth assert (R-2)", async ({
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page,
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testLogger,
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}) => {
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test.setTimeout(180000);
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await bootAndOpen(page);
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// Several snapshots: pre-fix this was one assert PER VIA PER SNAPSHOT.
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const snaps = await page.evaluate(() => {
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const m = (window as unknown as { Module: Mod }).Module;
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return [0, 1, 2].map(() => JSON.parse(m.kicadCollabSnapshot()));
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});
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const last = snaps[snaps.length - 1] as { added: Array<{ id: string; type: string; width?: number; drill?: number }> };
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const byId = new Map(last.added.map((i) => [i.id, i]));
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for (const [id, mm] of [[VIA1, 1.4], [VIA2, 0.8]] as const) {
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const via = byId.get(id);
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expect(via, `via ${id} present in snapshot`).toBeTruthy();
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expect(via!.type).toBe("PCB_VIA");
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// internal units are nm; the (size …) is the whole-stack width.
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expect(via!.width, `via ${id} width`).toBe(Math.round(mm * 1_000_000));
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expect(via!.drill, `via ${id} drill`).toBeGreaterThan(0);
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}
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const assertLines = [...testLogger.consoleLogs, ...testLogger.errors].filter((l) =>
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VIA_WIDTH_ASSERT.test(l),
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);
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expect(assertLines, "no PCB_VIA::GetWidth assert in the console").toEqual([]);
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});
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