0ad7af7742
Step 2 of the wire pipeline cold-open optimization plan. Extracts the per-wire vertex expansion into a free function and drives it from `from_batch` via `par_iter().map(...).reduce(...)`. Per-wire emission is already independent (no shared state, no order coupling — `block_cache` groups wires by style upstream), so the parallel-then-concatenate shape is correctness-preserving. Cold-open wire upload now scales with available cores; a drawing with many short wires shows the biggest win. Also collapses two near-identical emission loops (`from_batch`, `build`) into one shared helper. Co-Authored-By: Claude Opus 4.7 <noreply@anthropic.com>
299 lines
11 KiB
Rust
299 lines
11 KiB
Rust
// Wire GPU buffers — quad (TriangleList) rendering for thick lines.
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//
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// Each segment [A→B] emits 6 vertices (2 triangles). Every vertex carries
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// both endpoints so the vertex shader can compute the screen-space
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// perpendicular direction and expand the quad to the correct pixel width.
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//
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// NaN sentinel: text glyphs pack multiple disconnected strokes into one
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// WireModel, separated by [NaN, NaN, NaN] points. Segments where either
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// endpoint contains NaN are silently skipped during upload.
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//
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// Vertex layout (96 bytes, stride = 96):
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// pos_a [f32; 3] offset 0 12 B — segment start (world)
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// pos_b [f32; 3] offset 12 12 B — segment end (world)
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// which_end f32 offset 24 4 B — 0.0 = A end, 1.0 = B end
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// side f32 offset 28 4 B — ±1.0 perpendicular side
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// color [f32; 4] offset 32 16 B — RGBA [0,1]
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// distance f32 offset 48 4 B — arc-length from wire start
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// half_width f32 offset 52 4 B — half line width in pixels
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// pattern_length f32 offset 56 4 B — dash pattern total length
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// _pad f32 offset 60 4 B
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// pat0 [f32; 4] offset 64 16 B — pattern elements 0-3
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// pat1 [f32; 4] offset 80 16 B — pattern elements 4-7
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// ------
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// 96 B / vertex
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use crate::scene::wire_model::WireModel;
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use iced::wgpu;
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use rayon::prelude::*;
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/// Allocate a VERTEX buffer with `mapped_at_creation` and write `data` directly
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/// into the mapped slice. Skips the intermediate staging copy that
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/// `create_buffer_init` performs and avoids holding a second `Vec` worth of
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/// memory during upload — meaningful on cold open where wire buffers can run
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/// into the hundreds of MB.
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fn vertex_buffer_mapped(
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device: &wgpu::Device,
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label: &str,
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data: &[WireVertex],
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) -> wgpu::Buffer {
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let bytes: &[u8] = bytemuck::cast_slice(data);
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// wgpu rejects size-0 buffers; the renderer already guards `vertex_count`
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// before issuing a draw, so a placeholder allocation is fine here.
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let size = bytes.len().max(std::mem::size_of::<WireVertex>()) as u64;
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let buf = device.create_buffer(&wgpu::BufferDescriptor {
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label: Some(label),
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size,
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usage: wgpu::BufferUsages::VERTEX,
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mapped_at_creation: true,
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});
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{
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let mut view = buf.slice(..).get_mapped_range_mut();
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view[..bytes.len()].copy_from_slice(bytes);
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}
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buf.unmap();
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buf
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}
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// ── Vertex layout ─────────────────────────────────────────────────────────
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#[repr(C)]
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#[derive(Copy, Clone, bytemuck::Pod, bytemuck::Zeroable)]
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pub struct WireVertex {
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pub pos_a: [f32; 3],
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pub pos_b: [f32; 3],
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pub which_end: f32,
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pub side: f32,
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pub color: [f32; 4],
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pub distance: f32,
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pub half_width: f32,
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pub pattern_length: f32,
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pub _pad: f32,
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pub pat0: [f32; 4],
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pub pat1: [f32; 4],
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}
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impl WireVertex {
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pub fn layout<'a>() -> wgpu::VertexBufferLayout<'a> {
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wgpu::VertexBufferLayout {
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array_stride: std::mem::size_of::<WireVertex>() as u64,
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step_mode: wgpu::VertexStepMode::Vertex,
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attributes: &[
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wgpu::VertexAttribute {
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offset: 0,
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shader_location: 0,
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format: wgpu::VertexFormat::Float32x3,
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}, // pos_a
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wgpu::VertexAttribute {
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offset: 12,
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shader_location: 1,
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format: wgpu::VertexFormat::Float32x3,
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}, // pos_b
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wgpu::VertexAttribute {
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offset: 24,
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shader_location: 2,
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format: wgpu::VertexFormat::Float32,
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}, // which_end
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wgpu::VertexAttribute {
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offset: 28,
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shader_location: 3,
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format: wgpu::VertexFormat::Float32,
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}, // side
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wgpu::VertexAttribute {
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offset: 32,
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shader_location: 4,
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format: wgpu::VertexFormat::Float32x4,
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}, // color
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wgpu::VertexAttribute {
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offset: 48,
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shader_location: 5,
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format: wgpu::VertexFormat::Float32,
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}, // distance
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wgpu::VertexAttribute {
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offset: 52,
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shader_location: 6,
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format: wgpu::VertexFormat::Float32,
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}, // half_width
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wgpu::VertexAttribute {
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offset: 56,
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shader_location: 7,
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format: wgpu::VertexFormat::Float32,
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}, // pattern_length
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wgpu::VertexAttribute {
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offset: 64,
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shader_location: 8,
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format: wgpu::VertexFormat::Float32x4,
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}, // pat0
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wgpu::VertexAttribute {
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offset: 80,
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shader_location: 9,
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format: wgpu::VertexFormat::Float32x4,
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}, // pat1
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],
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}
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}
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}
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// ── GPU handle ────────────────────────────────────────────────────────────
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pub struct WireGpu {
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pub vertex_buffer: wgpu::Buffer,
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pub vertex_count: u32,
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/// Paper-space bbox [x0, y0, x1, y1] for GPU scissor clipping.
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/// Set only for viewport-projected wires; None for regular wires.
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pub vp_scissor: Option<[f32; 4]>,
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}
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/// Expand one `WireModel` into its flat vertex stream (6 verts per finite
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/// segment). Pulled out so both the single-wire and batched paths share the
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/// same emission logic, and so the batched path can `par_iter().flat_map`
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/// across wires on cold open.
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fn emit_wire_vertices(wire: &WireModel, color: [f32; 4]) -> Vec<WireVertex> {
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let pat0 = [
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wire.pattern[0],
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wire.pattern[1],
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wire.pattern[2],
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wire.pattern[3],
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];
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let pat1 = [
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wire.pattern[4],
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wire.pattern[5],
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wire.pattern[6],
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wire.pattern[7],
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];
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let half_width = wire.line_weight_px * 0.5;
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let n = wire.points.len();
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let seg_count = n.saturating_sub(1);
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if seg_count == 0 {
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return Vec::new();
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}
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let mut dists = vec![0.0_f32; n];
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for i in 1..n {
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let p = wire.points[i - 1];
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let q = wire.points[i];
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if !p[0].is_finite() || !q[0].is_finite() {
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// plinegen=false: reset to 0 at the first real point after a NaN separator.
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dists[i] = if !wire.plinegen && !p[0].is_finite() && q[0].is_finite() {
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0.0
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} else {
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dists[i - 1]
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};
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} else {
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let dx = q[0] - p[0];
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let dy = q[1] - p[1];
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let dz = q[2] - p[2];
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dists[i] = dists[i - 1] + (dx * dx + dy * dy + dz * dz).sqrt();
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}
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}
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let mut vertices: Vec<WireVertex> = Vec::with_capacity(seg_count * 6);
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for i in 0..seg_count {
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let a = wire.points[i];
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let b = wire.points[i + 1];
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if !a[0].is_finite()
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|| !a[1].is_finite()
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|| !a[2].is_finite()
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|| !b[0].is_finite()
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|| !b[1].is_finite()
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|| !b[2].is_finite()
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{
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continue;
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}
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let dist_a = dists[i];
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let dist_b = dists[i + 1];
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let make = |which_end: f32, side: f32| -> WireVertex {
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let dist = if which_end < 0.5 { dist_a } else { dist_b };
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WireVertex {
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pos_a: a,
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pos_b: b,
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which_end,
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side,
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color,
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distance: dist,
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half_width,
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pattern_length: wire.pattern_length,
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_pad: 0.0,
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pat0,
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pat1,
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}
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};
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vertices.push(make(0.0, -1.0));
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vertices.push(make(1.0, -1.0));
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vertices.push(make(1.0, 1.0));
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vertices.push(make(0.0, -1.0));
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vertices.push(make(1.0, 1.0));
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vertices.push(make(0.0, 1.0));
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}
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vertices
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}
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impl WireGpu {
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pub fn new(device: &wgpu::Device, wire: &WireModel) -> Self {
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let mut g = Self::build(device, wire, wire.color);
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g.vp_scissor = wire.vp_scissor;
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g
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}
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/// Merge multiple WireModels into GPU buffers chunked to fit the 256 MB GPU limit.
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/// Each wire keeps its own color and pattern — they're stored per-vertex.
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/// Returns an empty Vec if the combined vertex list is empty.
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pub fn from_batch(device: &wgpu::Device, wires: &[WireModel]) -> Vec<Self> {
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let total_segs: usize = wires.iter().map(|w| w.points.len().saturating_sub(1)).sum();
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if total_segs == 0 {
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return vec![];
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}
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// Parallel per-wire vertex emission. `flat_map_iter` keeps memory peak
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// sane (one Vec<WireVertex> per wire, then concatenated) while letting
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// rayon spread CPU work across cores. Ordering is preserved.
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let vertices: Vec<WireVertex> = wires
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.par_iter()
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.map(|wire| emit_wire_vertices(wire, wire.color))
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.reduce(Vec::new, |mut acc, mut chunk| {
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if acc.is_empty() {
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chunk
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} else if chunk.is_empty() {
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acc
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} else {
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acc.append(&mut chunk);
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acc
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}
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});
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if vertices.is_empty() {
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return vec![];
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}
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// GPU max buffer size is 256 MB; chunk to stay within the limit.
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const MAX_VERTS: usize = 268_435_456 / std::mem::size_of::<WireVertex>();
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vertices
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.chunks(MAX_VERTS)
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.enumerate()
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.map(|(i, chunk)| {
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let label = format!("wire.batch.vbuf.{i}");
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let vertex_buffer = vertex_buffer_mapped(device, &label, chunk);
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Self {
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vertex_buffer,
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vertex_count: chunk.len() as u32,
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vp_scissor: None,
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}
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})
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.collect()
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}
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fn build(device: &wgpu::Device, wire: &WireModel, color: [f32; 4]) -> Self {
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let vertices = emit_wire_vertices(wire, color);
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let label = format!("wire.vbuf.{}", wire.name);
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let vertex_buffer = vertex_buffer_mapped(device, &label, &vertices);
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Self {
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vertex_buffer,
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vertex_count: vertices.len() as u32,
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vp_scissor: None,
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}
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}
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}
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